More tests added (also parallel)

source/KKRhost/.gitlab-ci.yml

source/KKRhost/tests/run_all.py

source/KKRhost/tests/run_all.sh

...sts/test_inputs/test_4_Jijs_Fe_slab_lmax2_noSOC/inputcard

...sts/test_inputs/test_4_Jijs_Fe_slab_lmax2_noSOC/potential

..._inputs/test_4_Jijs_Fe_slab_lmax2_noSOC/ref/Jij.atom00002

..._inputs/test_4_Jijs_Fe_slab_lmax2_noSOC/ref/Jij.atom00003

...ests/test_inputs/test_4_Jijs_Fe_slab_lmax2_noSOC/shapefun

...test_5_Silicon_lloyd_kkrflex_output_lmax2_noSOC/inputcard

...test_5_Silicon_lloyd_kkrflex_output_lmax2_noSOC/potential

...con_lloyd_kkrflex_output_lmax2_noSOC/ref/kkrflex_atominfo

...ilicon_lloyd_kkrflex_output_lmax2_noSOC/ref/kkrflex_green

..._kkrflex_output_lmax2_noSOC/ref/kkrflex_hoststructure.dat

...yd_kkrflex_output_lmax2_noSOC/ref/kkrflex_intercell_cmoms

...loyd_kkrflex_output_lmax2_noSOC/ref/kkrflex_intercell_ref

...Silicon_lloyd_kkrflex_output_lmax2_noSOC/ref/kkrflex_tmat

...uts/test_5_Silicon_lloyd_kkrflex_output_lmax2_noSOC/scoef

.../test_5_Silicon_lloyd_kkrflex_output_lmax2_noSOC/shapefun

...est_6_Silicon_lloyd_FERMIOUT_output_lmax2_noSOC/inputcard

...est_6_Silicon_lloyd_FERMIOUT_output_lmax2_noSOC/potential